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takeMS ECC registered |
Automatic debugger
Error-free processing of large amounts of data
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Errors can be detected and/or corrected with the error detection and error correction code (ECC) and the test sum algorithm of the registered chip. As a result, these types of modules are always used where large quantities of data are being moved as is the case for servers and workstations.
The trade-off for greater data integrity is a module that is slower by one clock cycle. In a direct comparison, unbuffered memory with the same clock cycle is always faster. But this is a small price to pay for the gains in stability to the system which can often have hundreds of clients attached to it.
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DDR2 PC800 ECC reg. |
1 GB |
TMS1GB272D081-805 |
DDR2 PC800 ECC reg. |
512 MB |
TMS51B272C081-805 |
DDR2 PC667 ECC reg. |
1 GB |
TMS1GB272D081-665 |
DDR2 PC667 ECC reg. |
512 MB |
TMS51B272C081-665 |
DDR2 PC533 ECC reg. |
2 GB |
TMS2GR272D041-534 |
DDR2 PC533 ECC reg. |
1 GB |
TMS1GR272D041-534 |
DDR2 PC533 ECC reg. |
512 MB |
TMS51R272C041-534 |
DDR2 PC400 ECC reg. |
2 GB |
TMS2GR272D041-402 |
DDR2 PC400 ECC reg. |
1 GB |
TMS1GR272D041-402 |
DDR2 PC400 ECC reg. |
512 MB |
TMS51R272C041-402 |
DDR PC400 ECC reg. |
2 GB |
BD2048TEC860 |
DDR PC400 ECC reg. |
1 GB |
BD1024TEC860 |
DDR PC400 ECC reg. |
512 MB |
BD512TEC860 |
DDR PC333 ECC reg. |
2 GB |
BD2048TEC850 |
DDR PC333 ECC reg. |
1 GB |
BD1024TEC850 |
DDR PC333 ECC reg. |
512 MB |
BD512TEC850 |
DDR PC266 ECC reg. |
2 GB |
BD2048TEC800 |
DDR PC266 ECC reg. |
1 GB |
BD1024TEC800 |
DDR PC266 ECC reg. |
512 MB |
BD512TEC800 |
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